XEN II: Time Switch Hardware

The XEN time switch is a fairly complex piece of hardware. The design of this module needs to be understood in detail for software programming of the time switch. The block diagram of the time switch logic is shown below:

time switch - digital trunk to highway

This diagram describes the switching of data received on the digital trunks to the CAS or Service Highways. Basic functioning of the time switch is described below:

  1. The time slot data is received from the 32 digital trunks every slot, i.e. every 3.9 ms. (A complete 32 slot digital trunk frame is received in 125ms. Thus time to receive every slot is 125 ms/32 = 3.9 ms)
  2. This data is written into a PCM memory. The address for storing the data is derived from the current slot number (0-31) and the current DTK number (0-31) obtained from the DTK Interface block (the MUX shown in the figure, selects the y9-y0 inputs during the write cycles)
  3. Thus after a 125 ms frame elapses, the PCM memory would contain the PCM data received from all the DTKs in the last frame. This data has to be transfered to a specified slot on the CAS/Service highways.
  4. Switching is carried out by using the Address Memory. Address lines a11-a2 to the Address memory are driven by the current slot number being transmitted on the CAS highways. Address lines a1-a0 are driven by the Higway Select signal. This signal cycles through 00, 01 and 10 for every slot. These values correspond to the CAS-0 Highway (00), CAS-1 Highway (01) and the Service Highway (10). This selection is controlled by the DEMUX shown in the figure.
  5. The DTK slot number, Slot # stored in the Address Memory (d9-d0) decide which slot from the PCM memory will be switched to the current slot on the CAS/Service highways.

Address Memory Layout

The Address Memory is organized as shown below. Note that the memory locations corresponding to the 11 value for the Highway Select signal have been marked as reserved. The first column in the table specifies the address at which the Slot# and DTK# will have to be written to switch the data to the specified slot on the specified highway.

Address Highway Timeslot Switch To
0x0000 Timeslot 0 CAS-0 Highway Timeslot 0
0x0001 Timeslot 0 CAS-1 Highway Timeslot 0
0x0002 Timeslot 0 Service Highway Timeslot 0
0x0003 Reserved Reserved
0x0004 Timeslot 1 CAS-0 Highway Timeslot 1
0x0005 Timeslot 1 CAS-1 Highway Timeslot 1
0x0006 Timeslot 1 Service Highway Timeslot 1
0x0007 Reserved Reserved
... ... ...
... ... ...
0x07FC Timeslot 1023 CAS-0 Highway Timeslot 1023
0x07FD Timeslot 1023 CAS-1 Highway Timeslot 1023
0x07FE Timeslot 1023 Service Highway Timeslot 1023
0x07FF Reserved Reserved


Lets consider the example of switching of time-slot 3 on DTK 5 to time slot 1 on CAS-1 highway. This switching will be done by writing on the Address memory location 0x0005 corresponds to time slot 1 on the CAS-1 Highway. The data to be written in the address memory is determined by the DTK time slot, DTK #. Thus the data to be written is 0x65.

DTK Slot # (5 bit) DTK # (5 bit)
3 5

Once the Address Memory has been updated, the following sequence will repeat every 125 ms:

  1. The digital trunk logic moves to DTK slot 3 reception. Time slot 3 on all the digital trunks will be received at the same time.
  2. The hardware cycles through all the digital trunks and performs a write on the PCM memory by addressing it by the current slot # (3 in this case) and the DTK #. In this fashion the PCM sample received on DTK 5, Slot 3 is saved in the PCM memory location corresponding to it.
  3. In parallel, the highway logic is switching data to the three highways. The highway slot counter starts at highway slot 0. When it reaches highway slot 1, it uses the Highway timeslot and select signals to access the Address memory. Location 0x0004, 0x0005, 0x0006 are accessed to switch the data to the three highways.
  4. When location 0x0005 is read, the DTK Slot # 3 and the DTK #5 are obtained.
  5. The DTK Slot # and DTK # are used to access the PCM memory (A read is being carried out on the PCM memory, so the MUX selects the x9-x0 inputs)
  6. The Highway Select bits are 1 at this time so the DMUX passes the data to the CAS-1 interface)